62 research outputs found

    Posicionamiento de las mujeres como locutoras en las transmisiones de programas radiales en Santiago de Chile

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    This paper aims to describe the role of women in FM radios broadcasting in Santiago de Chile. A database was created in order to identify the number of women participating as announcers and to observe, through the categorization of different programs, which is the role they have been given. This is a descriptive analysis that follows the notions of communicational framing of gender,agenda setting and critical feminist analysis. It also relates the underrepresentation of women in radio broadcasting with the masculinization of public spaces and power.Este artículo busca describir el rol de las mujeres en las radios de Frecuencia Modulada que transmiten en Santiago de Chile. Para ello levanta información respecto a la cantidad de mujeres que ocupan roles de locución y observa a través de la categorización de los programas qué espacios se les han asignado. Se trata de un análisis descriptivo que discute mediante las nociones del encuadre de género, agenda setting y análisis crítico feminista la subrepresentación de las mujeres en la locución radial. Junto a esto, da cuenta de algunas relaciones entre los resultados obtenidos en esta investigación y la masculinización de los espacios públicos y de poder

    Big Data Geospatial Processing for Massive Aerial LiDAR Datasets

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    [Abstract] For years, Light Detection and Ranging (LiDAR) technology has been considered as a challenge when it comes to developing efficient software to handle the extremely large volumes of data this surveying method is able to collect. In contexts such as this, big data technologies have been providing powerful solutions for distributed storage and computing. In this work, a big data approach on geospatial processing for massive aerial LiDAR point clouds is presented. By using Cassandra and Spark, our proposal is intended to support the execution of any kind of heavy time-consuming process; nonetheless, as an initial case of study, we have focused on fast ground-only rasters obtention to generate digital terrain models (DTMs) from massive LiDAR datasets. Filtered clouds obtained from the isolated processing of adjacent zones may exhibit errors located on the boundaries of the zones in the form of misclassified points. Usually, this type of error is corrected through manual or semi-automatic procedures. In this work, we also present an automated strategy for correcting errors of this type, improving the quality of the classification process and the DTMs obtained while minimizing user intervention. The autonomous nature of all computing stages, along with the low processing times achieved, opens the possibility of considering the system as a highly scalable service-oriented solution for on-demand DTM generation or any other geospatial process. Said solution would be a highly useful and unique service for many users in the LiDAR field, and one which could get near to real-time processing with appropriate computational resources.Xunta de Galicia; ED431C 2017/04Consolidation Programme of Competitive Research Units; R2016/037Xunta de Galicia; ED431G/01Ministerio de Economía y Competitividad; TIN2016-75845-

    Supporting multi-resolution out-of-core rendering of massive LiDAR point clouds through non-redundant data structures

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    This is an Accepted Manuscript of an article published by Taylor & Francis in INTERNATIONAL JOURNAL OF GEOGRAPHICAL INFORMATION SCIENCE on 28 Nov 2018, available at: https://doi.org/10.1080/13658816.2018.1549734[Abstract]: In recent years, the evolution and improvement of LiDAR (Light Detection and Ranging) hardware has increased the quality and quantity of the gathered data, making the storage, processing and management thereof particularly challenging. In this work we present a novel, multi-resolution, out-of-core technique, used for web-based visualization and implemented through a non-redundant, data point organization method, which we call Hierarchically Layered Tiles (HLT), and a tree-like structure called Tile Grid Partitioning Tree (TGPT). The design of these elements is mainly focused on attaining very low levels of memory consumption, disk storage usage and network traffic on both, client and server-side, while delivering high-performance interactive visualization of massive LiDAR point clouds (up to 28 billion points) on multiplatform environments (mobile devices or desktop computers). HLT and TGPT were incorporated and tested in ViLMA (Visualization for LiDAR data using a Multi-resolution Approach), our own web-based visualization software specially designed to work with massive LiDAR point clouds.This research was supported by Xunta de Galicia under the Consolidation Programme of Competitive Reference Groups, co-founded by ERDF funds from the EU [Ref. ED431C 2017/04]; Consolidation Programme of Competitive Research Units, co-founded by ERDF funds from the EU [Ref. R2016/037]; Xunta de Galicia (Centro Singular de Investigación de Galicia accreditation 2016/2019) and the European Union (European Regional Development Fund, ERDF) under Grant [Ref. ED431G/01]; and the Ministry of Economy and Competitiveness of Spain and ERDF funds from the EU [TIN2016-75845-P].Xunta de Galicia; ED431C 2017/04Xunta de Galicia; R2016/037Xunta de Galicia; ED431G/0

    Techniques for Autotuning Algorithms on Heterogenous Platforms

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    Proceedings of the First PhD Symposium on Sustainable Ultrascale Computing Systems (NESUS PhD 2016) Timisoara, Romania. February 8-11, 2016.Current GPUs (Graphic Processing Units) can obtain high computational performance in scientific applications. Nevertheless, programmers have to use suitable parallel algorithms for these architectures and have to consider optimization techniques in the implementation in order to achieve that performance. This thesis is focused on designing and implementing parallel prefix algorithms into GPU architectures with little effort. For that, we have developed a very optimized library called BPLG (Tuning Butterfly Processing Library for GPUs) and based on a set of building blocks that enable to easily design well-known algorithms such as FFT, tridiagonal systems solvers, scan operator, sorting or signal processing. This library is designed under a tuning methodology based on two-stages indentified as GPU resource analysis and operator string manipulation. Specifically, this strategy is focused on a set of parallel prefix algorithms that can be represented according to a set of common permutations of the digits of each of its element indices [4], denoted as Index-Digit (ID) algorithms. So far, the proposed methodology has obtained very good results with respect to state-of-art libraries, as CUFFT, CUSPARSE, CUDPP or ModernGPU.European Cooperation in Science and Technology. COS

    Tree Partitioning Reduction: A New Parallel Partition Method for Solving Tridiagonal Systems

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    © 2019 Copyright held by the owner/author(s). This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in ACM Transactions on Mathematical Software, https://doi.org/10.1145/3328731This work was cofunded by the Government of Galicia and ERDF funds from the EU, under the Consolidation Programme of Competitive Reference Groups [ED431C 2017/04], by the Ministry of Economy and Competitiveness of Spain and ERDF funds [TIN2016-75845-P], and by the Ministry of Education of Spain (FPU14/02801). Additionally, it has been also supported by the Xunta de Galicia (Centro Singular de Investigación de Galicia accreditation 2016-2019) and ERDF funds [ED7431G/01]Xunta de Galicia; ED431C 2017/04Xunta de Galicia; ED7431G/0

    BPLG–BMCS: GPU-sorting algorithm using a tuning skeleton library

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    This is a post-peer-review, pre-copyedit version of an article published in Journal of Supercomputing. The final authenticated version is available online at: https://doi.org/10.1007/s11227-015-1591-9[Abstract] In this work, we present an efficient and portable sorting operator for GPUs. Specifically, we propose an algorithmic variant of the bitonic merge sort which reduces the number of processing stages and internal steps, increasing the workload per thread and focusing on a multi-batch execution for multiple problems of a small size. This proposal is well matched to current GPU architectures and we apply different CUDA optimizations to improve performance. For portability, we use a library based on tuning building blocks. Thanks to this parametrization, the library can easily be tuned for different CUDA GPU architectures. Our proposals obtain competitive performance on two recent NVIDIA GPU architectures, providing an improvement of up to 11,794 × over CUDPP and up to 6467 × over ModernGPU.Xunta de Galicia; GRC2013/055Ministerio de Economía y Competitividad; TIN2013-42148-PCOST Program Action; IC130

    Portable and efficient FFT and DCT algorithms with the Heterogeneous Butterfly Processing Library

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    Versión final aceptada de: https://doi.org/10.1016/j.jpdc.2018.11.011This version of the article: Vázquez, S., Amor, M., Fraguela, B. B. (2019). 'Portable and efficient FFT and DCT algorithms with the heterogeneous butterfly processing library', has been accepted for publication in Journal of Parallel and Distributed Computing, 125, 135–146. The Version of Record is available online at https://doi.org/10.1016/j.jpdc.2018.11.011.[Abstract]: The existence of a wide variety of computing devices with very different properties makes essential the development of software that is not only portable among them, but which also adapts to the properties of each platform. In this paper, we present the Heterogeneous Butterfly Processing Library (HBPL), which provides optimized portable kernels for problems of small sizes that allow using orthogonal transform algorithms such as the FFT and DCT on different accelerators and regular CPUs. Our library is implemented on the OpenCL standard, which provides portability on a large number of platforms. Furthermore, high performance is achieved on a wide range of devices by exploiting run-time code generation and metaprogramming guided by a parametrization strategy. An exhaustive evaluation on different platforms shows that our proposal obtains competitive or better performance than related libraries.This research has received financial support from the Ministerio de Economía y Competitividad of Spain and European Regional Development Fund (ERDF) funds (80%) of the EU (TIN2016-75845-P), by the Consellería de Cultura, Educación e Ordenación Universitaria, Xunta de Galicia co-founded by European Regional Development Fund (ERDF) funds under the Consolidation Programme of Competitive Reference Groups (Ref. ED431C 2017/04) and the Consolidation Programme of Competitive Research Units (Ref. R2014/049 and Ref. R2016/037) as well as by the Consellería de Cultura, Educación e Ordenación Universitaria, Xunta de Galicia (Centro Singular de Investigación de Galicia accreditation 2016–2019) and the European Union (European Regional Development Fund, ERDF) under Grant Ref. ED431G/01.Xunta de Galicia; ED431C 2017/04Xunta de Galicia; ED431G/01Xunta de Galicia; R2014/049Xunta de Galicia; R2016/03

    Free adaptive tessellation strategy of bézier surfaces

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    [Abstract] Rendering of Bézier surfaces is currently performed by tessellating the model on the GPU and rendering the highly detailed triangle mesh. Whereas non-adaptive strategies apply the same tessellation pattern to the whole surface resulting in a uniform tessellation of the patch, adaptive approaches make it possible to reduce the number of triangles generated without a loss of quality. However, the most usual approaches to adaptive tessellation have little flexibility and do redundant computations and memory accesses, as each sample is independently evaluated in the Domain Shader of the DirectX11 pipeline. In this paper an adaptive tessellation technique based on the exploitation of the spatial coherence data within each surface is presented. The GPU implementation of this technique is simple and efficient and, as consequence, the tessellation of complex models can be performed in real-time. The analysis of the GPU performance and limitations for different adaptive degree of the tessellation performed suggest innovations in future graphics card generations for supporting a larger degree of adaptivity without a penalty

    Efficient Culling Techniques for Interactive Deformable NURBS Surfaces on GPU

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    [Abstrtact] InfoValue: NURBS (Non-uniform rational B-splines) surfaces are the standard freeform representation in Computer-Aided Design (CAD) applications. Rendering NURBS surfaces accurately while they are interactively manipulated and deformed is a challenging task. In order to achieve it, the elimination from pipeline in early stages of back-facing surfaces or surface pieces is a key advantage. Furthermore, an effective interactive manipulation implies that all the culling computations should be performed for each frame, facing the possibility of fast changes in occlusion information. In this paper, different interactive culling strategies for NURBS surfaces are presented and analyzed. These culling techniques are based on the exploitation of the geometric properties presented in a NURBS surface, that allow easily to find bounds for it in screen space for each frame. Furthermore, the culling overhead for our proposals is small compared to the computational saving, outperforming a proposal without culling. An implementation of these strategies using current GPUs is presented, achieving real-time and interactive rendering rates of complex parametric models.Xunta de Galicia y fondos FEDER; GRC2013/055Ministerio de Economía y Competitividad y fondos FEDER; TIN2013-42148-

    Solving Large Problem Sizes of Index-Digit Algorithms on GPU: FFT and Tridiagonal System Solvers

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    [Abstract] Current Graphics Processing Units (GPUs) are capable of obtaining high computational performance in scientific applications. Nevertheless, programmers have to use suitable parallel algorithms for these architectures and usually have to consider optimization techniques in the implementation in order to achieve said performance. There are many efficient proposals for limited-size problems which fit directly in the shared memory of CUDA GPUs, however, there are few GPU proposals that tackle the design of efficient algorithms for large problem sizes that exceed shared memory storage capacity. In this work, we present a tuning strategy that addresses this problem for some parallel prefix algorithms that can be represented according to a set of common permutations of the digits of each of its element indices [1], denoted as Index-Digit (ID) algorithms. Specifically, our strategy has been applied to develop flexible Multi-Stage (MS) algorithms for the Fast Fourier Transform (FFT) algorithm (MS-ID-FFT) and a tridiagonal system solver (MS-ID-TS) on the GPU. The resulting implementation is compact and outperforms other well-known and commonly used state-of-the-art libraries, with an improvement of up to 1.47x with respect to NVIDIA's complex CUFFT, and up to 33.2x in comparison with NVIDIA's CUSPARSE for real data tridiagonal systems
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